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Biblio
2010
L. Suresh, Rameshan, N., Narayan, A., Zwolinski, M., Gaur, M. S., Laxmi, V., and Singh, V.,
“EDA Design Flow Acceleration using GPGPUs”. 2010.
2011
L. Suresh, Rameshan, N., Gaur, M. S., Zwolinski, M., and Laxmi, V.,
“Acceleration of functional validation using gpgpu”, in
Electronic Design, Test and Application (DELTA), 2011 Sixth IEEE International Symposium on, 2011.
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