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Biblio
M
M. March, García, J., Cerdà-Alabern, L., Corbal, J., and Valero, M.,
“Analysis of a High Performance DRAM/SRAM Memory Scheme for Fast Packet Buffers”, in
Proc. of the First Workshop on Productivity and Performance in High-End Computing (WEPA-1), in conjunction with HPCA-10, Madrid, Spain, 2004.