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March, M., García, J., Cerdà-Alabern, L., Corbal, J., & Valero, M. (2004). Analysis of a High Performance DRAM/SRAM Memory Scheme for Fast Packet Buffers. Presented at the. Madrid, Spain.

García, J., March, M., Cerdà-Alabern, L., Corbal, J., & Valero, M. (2004). On the Design of Hybrid DRAM/SRAM Memory Schemes for Fast Packet Buffers. 15–19. Phoenix, Arizona, USA. (Original work published 2026)

García, J., Corbal, J., Cerdà-Alabern, L., & Valero, M. (2003). Design and Implementation of High-Performance Memory Systems for Future Packet Buffers. 373–384. San Diego, California, USA.

García, J., March, M., Cerdà-Alabern, L., Corbal, J., & Valero, M. (2003). On the Design of Hybrid DRAM/SRAM Memory Schemes for Fast Packet Buffers. Universitat Politècnica de Catalunya. Retrieved from http://www.ac.upc.es/recerca/reports/index-i,en.html (Original work published 2026)