R. Brunner and Freitag, F.,
“Elaborating a Decentralized Market Information System”, in
On the Move to Meaningful Internet Systems 2007: OTM Academy Doctoral Consortium, Vilamoura, Portugal, 2007, vol. 4805, pp. 245–254.
J. Acosta, Rico, U. Pineda, Luna-Rivera, J. Martin, Stevens, E., Campos-Canton, I., Navarro, L., Laganà, A., Gavrilova, M. L., Kumar, V., Mun, Y., Tan, C. Jeng Kenne, and Gervasi, O.,
“The Effects of Network Topology on Epidemic Algorithms.”, in
Lecture Notes in Computer Science, 2004, vol. 3046, pp. 177–184.
R. González and Cerdà-Alabern, L.,
“DRAP: Dual-Queue Rate-Controlled Access Point for Multimedia Communications in WLAN Hotspots”, in
Proc. of the Fifth IASTED International Conference on Communication Systems and Networks (CSN), Palma de Mallorca, Spain, 2006, pp. 159–164.
L. Navarro, Marquès, J. Manuel, and Freitag, F.,
“On distributed systems and CSCL”, in
CCGRID ’04: Proceedings of the 2004 IEEE International Symposium on Cluster Computing and the Grid, Washington, DC, USA, 2004, pp. 113–118.
D. Vega, Meseguer, R., and Freitag, F.,
“Diseño e implementación de un simulador para explorar la cooperación en entornos distribuidos”, in
XIX Jornadas de Concurrencia y Sistemas Distribuidos (JCSD’10), La granja de San Ildefonso, Spain, 2011, pp. 311-326.
D. Franquesa and Navarro, L.,
“Devices as a Commons: Limits to Premature Recycling”, in
Proceedings of the 2018 Workshop on Computing within Limits, New York, NY, USA, 2018.
E. Dimogerontakis, Meseguer, R., Navarro, L., Ochoa, S. F., and Veiga, L.,
“Design Trade-offs of Crowdsourced Web Access in Community Networks”, in
IEEE 21st International Conference on Computer Supported Cooperative Work in Design (CSCWD), Wellington, New Zealand, 2017.
J. García, March, M., Cerdà-Alabern, L., Corbal, J., and Valero, M.,
“On the Design of Hybrid DRAM/SRAM Memory Schemes for Fast Packet Buffers”, in
Proc. of the IEEE High Performance Switching and Routing (HPSR), Phoenix, Arizona, USA, 2004, pp. 15–19.
J. García, Corbal, J., Cerdà-Alabern, L., and Valero, M.,
“Design and Implementation of High-Performance Memory Systems for Future Packet Buffers”, in
Proc. of the 36th Annual International Symposium on Microarchitecture (MICRO'36), San Diego, California, USA, 2003, pp. 373–384.